The AMD EPYC™ 9354P is a server processor for the SP5 platform, based on the Genoa architecture (). It features 32 cores and 64 threads, with a base frequency of 3.25 GHz and boost up to 3.80 GHz. The CPU has 256 MB of L3 cache with a 280 W TDP. Memory support includes DDR5.
32-Core 64-Thread @ 3.80 GHz | SP5
Manufacturer-verified specifications (Manufacturer-Verified (MV-1) · Source: AMD.com)
| Family | EPYC |
| Series | EPYC 9004 Series |
| Codename | Genoa |
| Cores / Threads | 32 / 64 |
| Socket | SP5 |
| Base Clock | 3.25 GHz |
| Max Boost Clock | 3.80 GHz |
| Unlocked | No |
| L3 Cache | 256 MB |
| Memory Type | DDR5 |
| Memory Speed | 4800 MT/s |
| Channels | 12 |
| ECC Memory | Yes |
| Scalability | 1S |
| TDP | 280 W |
| PCIe Version | 5.0 |
| Launch Date | 11/10/2022 |
| Ordering Code | 100-000000805 |
| Package | Tray |
The AMD EPYC™ 9354P uses the SP5 socket.
The AMD EPYC™ 9354P supports DDR5.
The AMD EPYC™ 9354P has 32 cores and 64 threads with a max boost clock of 3.80 GHz.
The AMD EPYC™ 9354P has a default TDP of 280 W.
No, the AMD EPYC™ 9354P is locked and does not support manual overclocking.
Product: AMD EPYC™ 9354P MPN: 100-000000805 Schemas: Product + BreadcrumbList Properties: 12 additionalProperty entries