The AMD EPYC™ 9255 is a server processor for the SP5 platform, based on the Turin architecture (). It features 24 cores and 48 threads, with a base frequency of 3.20 GHz and boost up to 4.30 GHz. The CPU has 128 MB of L3 cache with a 200 W TDP. Memory support includes DDR5.
24-Core 48-Thread @ 4.30 GHz | SP5
Manufacturer-verified specifications (Manufacturer-Verified (MV-1) · Source: AMD.com)
| Family | EPYC |
| Series | EPYC 9005 Series |
| Codename | Turin |
| Cores / Threads | 24 / 48 |
| Socket | SP5 |
| Base Clock | 3.20 GHz |
| Max Boost Clock | 4.30 GHz |
| Unlocked | No |
| L3 Cache | 128 MB |
| Memory Type | DDR5 |
| Memory Speed | 6400 MT/s |
| Channels | 12 |
| ECC Memory | Yes |
| Scalability | 1S, 2S |
| TDP | 200 W |
| PCIe Version | 5.0 |
| Launch Date | 10/10/2024 |
| Ordering Code | 100-000000694 |
| Package | Tray |
The AMD EPYC™ 9255 uses the SP5 socket.
The AMD EPYC™ 9255 supports DDR5.
The AMD EPYC™ 9255 has 24 cores and 48 threads with a max boost clock of 4.30 GHz.
The AMD EPYC™ 9255 has a default TDP of 200 W.
No, the AMD EPYC™ 9255 is locked and does not support manual overclocking.
Product: AMD EPYC™ 9255 MPN: 100-000000694 Schemas: Product + BreadcrumbList Properties: 12 additionalProperty entries