The AMD EPYC™ 7252 is a server processor for the SP3 platform, based on the Rome architecture (). It features 8 cores and 16 threads, with a base frequency of 3.10 GHz and boost up to 3.20 GHz. The CPU has 64 MB of L3 cache with a 120 W TDP. Memory support includes DDR4.
8-Core 16-Thread @ 3.20 GHz | SP3
Manufacturer-verified specifications (Manufacturer-Verified (MV-1) · Source: AMD.com)
| Family | EPYC |
| Series | EPYC 7002 Series |
| Codename | Rome |
| Cores / Threads | 8 / 16 |
| Socket | SP3 |
| Base Clock | 3.10 GHz |
| Max Boost Clock | 3.20 GHz |
| Unlocked | No |
| L3 Cache | 64 MB |
| Memory Type | DDR4 |
| Memory Speed | 3200 MT/s |
| Channels | 8 |
| ECC Memory | Yes |
| Scalability | 1S, 2S |
| TDP | 120 W |
| PCIe Version | 4.0 |
| Ordering Code | 100-100000080WOF |
| Package | Box |
The AMD EPYC™ 7252 uses the SP3 socket.
The AMD EPYC™ 7252 supports DDR4.
The AMD EPYC™ 7252 has 8 cores and 16 threads with a max boost clock of 3.20 GHz.
The AMD EPYC™ 7252 has a default TDP of 120 W.
No, the AMD EPYC™ 7252 is locked and does not support manual overclocking.
Product: AMD EPYC™ 7252 MPN: 100-100000080WOF Schemas: Product + BreadcrumbList Properties: 11 additionalProperty entries